HILLSBORO, Ore.--(BUSINESS WIRE)--Lattice Semiconductor Corporation (NASDAQ: LSCC), the low power programmable leader, today announced an upcoming webinar on how a RISC-V embedded system can be implemented on small form factor, low-power Lattice FPGAs to help keep power consumption low and avoid data bottlenecks. Led by the Lattice Education Competence Center (LEC2), the webinar will specifically focus on using the Lattice Propel™ design environment to quickly and easily build, compile, analyze, and debug a hardware/software co-processing solution.

What: Implementing a Low Power, FPGA-based Embedded System with the Lattice Propel Design Environment and RISC-V

When: Monday, March 29, 2021 at 9:00 am PDT /12:00 pm EDT / 18:00 CET

Where: https://bit.ly/3vwgzb0

LEC2 provides Lattice’s customers and partners with the hands-on product training and application design expertise needed to get Lattice-based solutions to market quickly and easily. Focused solely on low-power Lattice FPGAs and award-winning solutions stacks, the LEC2 helps customers design and implement solutions for the industrial, automotive, communications, and computing markets.

For more information about the Lattice’s Propel FPGA design environment and the LEC2, please visit:

About Lattice Semiconductor

Lattice Semiconductor (NASDAQ: LSCC) is the low power programmable leader. We solve customer problems across the network, from the Edge to the Cloud, in the growing communications, computing, industrial, automotive, and consumer markets. Our technology, long-standing relationships, and commitment to world-class support lets our customers quickly and easily unleash their innovation to create a smart, secure and connected world.

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Lattice Announces Training Webinar Focused on Low Power, FPGA-based RISC-V Embedded System Design Using Lattice Propel Design Environment